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洪振东,周后荣,牛明慧,刘焕丽,程坤杰,许婉宁,尤立星,任洁,王镇.一种基于单磁通量子的超导纳米线单光子探测器阵列的读出电路[J].低温物理学报,2020,(5):219-227. [点击复制]
- HONG Zhendong,ZHOU Hourong,NIU Minghui,LIU Huanli,Cheng Kunjie,XU Wanning,YOU Lixing,REN Jie,WANG Zhen.A Readout Circuit of Superconducting Nanowire Single Photon Detector Array Based on Single Flux Quantum[J].LOW TEMPERATURE PHYSICAL LETTERS,2020,(5):219-227. [点击复制]
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| 一种基于单磁通量子的超导纳米线单光子探测器阵列的读出电路 |
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洪振东1,2,3, 周后荣1,2,3, 牛明慧1,2, 刘焕丽1,2, 程坤杰1,2,3, 许婉宁1,2,3, 尤立星1,2,3, 任洁1,2,3, 王镇1,2,3
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| (1.中国科学院上海微系统与信息技术研究所，信息功能材料国家重点实验室，上海200050;2.中国科学院超导电子学卓越创新中心，上海200050;3.中国科学院大学，北京100049) |
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| 摘要: |
| 超导纳米线单光子探测(Superconducting Nanowire Single Photon Detector, SNSPD)阵列可以实现单光子成像或高速单光子探测，如何有效对SNSPD阵列进行信号读出是实现SNSPD阵列的关键技术之一，本工作设计了一种基于超导单磁通量子(Single Flux Quantum, SFQ)的SNSPD阵列读出电路，该读出电路能够实现对阵列中SNSPD的地址分频，实验采用的核心编码电路利用4位二进制码对包含8个SNSPD的阵列进行编码，使用了基于SFQ的异或逻辑单元、D触发器、分路器和约瑟夫森传输线等标准单元，总计使用191个约瑟夫森结，采用两级流水线设计，仿真中最高可在19.4GH2的时钟频率下工作，功耗为42.1μW,在液氦环境下完成了编码电路的功能测试，验证了编码功能的正确性。 |
| 关键词: SNSPD, SFQ, 地址编码 |
| DOI： |
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| A Readout Circuit of Superconducting Nanowire Single Photon Detector Array Based on Single Flux Quantum |
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HONG Zhendong1,2,3, ZHOU Hourong1,2,3, NIU Minghui1,2, LIU Huanli1,2, Cheng Kunjie1,2,3, XU Wanning1,2,3, YOU Lixing1,2,3, REN Jie1,2,3, WANG Zhen1,2,3
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| (1.State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China;2.CAS Center for Excellence in Superconducting Electronics (CENSE), Shanghai 200050, China;3.University of Chinese Academy of Sciences. Beijing 100019, China) |
| Abstract: |
| Superconducting Nanowire Single Photon Detector (SNSPD) array can realize high-performance single photon imaging system or high-speed single-photon detection. The readout circuit of SNSPD array is one of the important research contents. A readout circuit frame of SNSPD array based on Single flux Quantum (SFQ) was designed. The core of the frame is the Address_encoder which uses a 4-bit binary code to realize the address resolution of the SNSPDs in the array which contains 8 SNSPDs. The circuit uses XOR logic unit, D flip-flop, Splitter and Josephson transmission line which are based on SFQ It adopts a two-stage pipeline design, which can work at a clock frequency of 19. 4 Ghz at the highest in simulation. The Address encoder has a power consumption of 42. lμw, which can be effectively used in an array with high count rate detectors to achieve high-speed detection a total of 191 Josephson sections are used. The functional test of the coding circuit was completed under the liquid helium environment, and the correctness of the coding function was verified. |
| Key words: SNSPD, SFQ, Address encoding |
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