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  • 周涛,苏润丰,涂学凑,吴敬波,陈健,吴培亨.基于FPGA 的超导动态电感探测器频梳读出信号产生[J].低温物理学报,2023,(3):131-141.    [点击复制]
  • ZHOU Tao,SU Runfeng,TU Xuecou,WU Jingbo,CHEN Jian,WUPeiheng.Frequency Comb Signal Generation for Superconducting Kinetic Inductance Detector Readout Based on FPGA[J].LOW TEMPERATURE PHYSICAL LETTERS,2023,(3):131-141.   [点击复制]
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基于FPGA 的超导动态电感探测器频梳读出信号产生
周涛1, 苏润丰1, 涂学凑1,2, 吴敬波1,2, 陈健1,2, 吴培亨1,2
0
(1.南京大学 超导电子学研究所, 江苏 南京 210023;2.紫金山实验室, 江苏 南京 211111)
摘要:
超导动态电感探测器(Kinetic Inductance Detectors, KIDs) 作为一种新型的超导探测器, 在天文学等领域得到了广泛应用, 具有高灵敏度、 高能量分辨率等优点, 并且可以通过频域复用直接扩展到大型阵列. 然而, 为了支持上千像素的探测,KIDs 阵列需要产生复杂的频梳信号, 占用较大的信号带宽. 因此, 数模转换器件(Digital-to Analog Converter, DAC) 的采样率对于 KIDs 阵列的读出电路实现至关重要. 基于JESD204B 传输协议的高速 DAC相较于传统低电压差分信号(Low-Voltage Differential Signaling, LVDS) 协议的转换器具有更高的采样率和传输速率, 可用于频梳信号波形的产生. 为此, 本文提出了一种基于现场可编程门阵列(Field Programmable Gate Array, FPGA) 的设计, 以 Xilinx 公司 Kintex-7 系列 FPGA 为主控芯片, 通过高速串行接口JESD204B 和高速 DAC 芯片AD9136 实现高速数据传输,DAC 采样率为2 GSPS, 能生成带宽为1 GHz 的基带信号. 实验结果表明, 该设计能够有效地生成复杂的频梳信号, 具有较高的信号质量和灵活性, 解决了传统 DAC 及直接数字频率合成(Direct Digital Synthesizer, DDS) 器件难以产生复杂多变波形的难题, 有助于拓展 KIDs 阵列的工程应用.
关键词:  超导动态电感探测器, JESD204B 传输协议, 高速 DAC 芯片 AD9136 ,FPGA
DOI:10.13380/j .ltpl.2023.03.002
基金项目:国家自然科学基金(批准号:62004093 ,62035014, 62227820) 、 中央高校经费和江苏省电磁波先进调控技术重点实验室
Frequency Comb Signal Generation for Superconducting Kinetic Inductance Detector Readout Based on FPGA
ZHOU Tao1, SU Runfeng1, TU Xuecou1,2, WU Jingbo1,2, CHEN Jian1,2, WUPeiheng1,2
(1.Research Institute of Superconductor Electronics , Nanjing University , Nanjing 210023 , China;2.Purple Mountain Laboratory , Nanjing , 211111 , China)
Abstract:
As a novel type of superconducting detector, the kinetic inductance detectorsC KIDs) have found broad applications in astronomy and other fields due to their superior characteristics, including high sensitivity and energy resolution. Moreover KIDs can be directly extended to a large array by frequency domain multiplexing. However, generating complex frequency comb signals for KIDs arrays to support the detection of thousands of pixels requires a substantial signal bandwidth. Therefore, the sampling rate of the digital-to-analog converter (DAC is crucial for the readout circuit implementation of the KIDs arrays. Compared with traditional Low-Voltage Differential Signaling (LVDS) protocol converters, high-speed DACs based on the JESD204B transmission protocol offer higher sampling rates and transmission speeds, making them suitable for generating frequency comb signal waveforms. In this regard, we propose a design based on Field Programmable Gate Array (FPGA), utilizing the Xilinx Kintex-7 series FPGA as the main control chip, and JESD204B high-speed serial interface and high-speed DAC chip AD9136 for high-speed data transmission. The DAC sampling rate of 2 GSPS can generate a baseband signal with a bandwidth up to 1 GHz. The proposed design provides effective solutions to the challenge of generating complex frequency comb signals with high signal quality and flexibility. It overcomes the limitations of traditional DACs and direct digital synthesizer (DDS) devices in generating complex and diverse waveforms. Therefore, it has the potential to facilitate the engineering application of KIDs arrays.
Key words:  Kinetic Inductance Detector, JESD204B, AD9136 , FPGA

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